The disclosure relates to a method for producing at least one via in a wafer.
The disclosure furthermore relates to a chip.
Vias are used to make electrical contact with microelectronic structures, such as semiconductor structures or the like, which consist for example of conductive and nonconductive layers arranged alternately.
A method for producing a via has been disclosed by U.S. Pat. No. 6,309,966 B1, for example. For this purpose, tungsten hexafluoride is applied to a wafer with a hole that has already been produced, and tungsten from the tungsten hexafluoride is then reduced with the aid of hydrogen or monosilane SiH4 and thus deposited. The tungsten then deposits in the hole and on the surface of the wafer. Since the deposited tungsten on the surface of the wafer is undesired, said tungsten is removed by means of polishing, with the result that only the holes are filled. Such a method is shown schematically in FIGS. 1A-1C.
In order to reduce the stress caused by a fully filled tungsten via in the wafer, firstly what has been disclosed involves introducing load relieving structures into the wafer material (see FIG. 1C). Secondly what has been disclosed involves not completely filling the hole with tungsten, but rather essentially applying tungsten only in a thin layer on the inner surface of the hole (see FIG. 1D).